Notice of Intent To Seek Partners for a Cooperative Research and Development Agreement and Licensing Opportunity for Operating System (OS) Friendly Microprocessor Architecture Invented and Patent Pending by U.S. Army Aviation and Missile Command, 6063-6064 [2015-02088]

Download as PDF Federal Register / Vol. 80, No. 23 / Wednesday, February 4, 2015 / Notices warehouse or servicing General Services Administration records holding center where it is held four years before being destroyed by shredding. The disposition for electronic media is four years after the final decision is made.’’ SYSTEM MANAGER(S) AND ADDRESS: Delete entry and replace with ‘‘Director/Chief Executive Officer, Army and Air Force Exchange Service, 3911 S. Walton Walker Boulevard, Dallas, TX 75236–1598.’’ NOTIFICATION PROCEDURE: Delete entry and replace with ‘‘Individuals seeking to determine whether information about themselves is contained in this system should address written inquiries to the Hearing Examiner’s Office at the Army and Air Force Exchange Service location where appeal/grievance was filed. Individual should provide full name, current address and telephone number, and signature. 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Individual should provide full name, current address and telephone number, and signature. In addition, the requester must provide a notarized statement or an unsworn declaration made in accordance with 28 U.S.C. 1746, in the following format: If executed outside the United States: ‘I declare (or certify, verify, or state) under penalty of perjury under the laws of the United State of America that the foregoing is true and correct. Executed on (date). (Signature).’ If executed within the United States, its territories, possessions, or VerDate Sep<11>2014 18:18 Feb 03, 2015 Jkt 235001 commonwealths: ‘I declare (or certify, verify, or state) under penalty of perjury that the foregoing is true and correct. Executed on (date). (Signature).’’’ * * * * * RECORD SOURCE CATEGORIES: Delete entry and replace with ‘‘From Exchange personnel office responsible for records on the employee; from the Exchange Grievance Examiner; from the Exchange employee and/or his/her representative and from medical officers and physicians.’’ * * * * * [FR Doc. 2015–02167 Filed 2–3–15; 8:45 am] BILLING CODE 5001–06–P DEPARTMENT OF DEFENSE Department of Army Notice of Intent To Seek Partners for a Cooperative Research and Development Agreement and Licensing Opportunity for Operating System (OS) Friendly Microprocessor Architecture Invented and Patent Pending by U.S. Army Aviation and Missile Command Department of Army, DoD. Notice of intent seeking partners. AGENCY: ACTION: The U.S. Army Aviation and Missile Command (AMRDEC) is seeking Cooperative Research and Development Agreement (CRADA) partners to collaborate in transitioning OS Friendly Microprocessor Architecture (OSFA) into commercial and/or government application(s). OSFA references approved for public release are provided [1–2]. Interested potential CRADA collaborators will receive detailed information on the current status of the project after signing a confidentiality disclosure agreement (CDA) with AMRDEC. Guidelines for the preparation of a full CRADA proposal will be communicated shortly thereafter to all respondents with whom initial confidential discussions will have established sufficient mutual interest. CRADA applications submitted after the due date may be considered if a suitable CRADA collaborator has not been identified by AMRDEC among the initial pool of respondents. Licensing of background technology related to this CRADA opportunity is also available to potential collaborators. DATES: Interested candidate partners must submit a statement of interest and capability to the AMRDEC point of contact before April 10, 2015 for consideration. SUMMARY: PO 00000 Frm 00025 Fmt 4703 Sfmt 4703 6063 Comments and questions may be submitted to: Department of Army, US Army Research, Development and Engineering Command, Aviation and Missile Research, Development, and Engineering Center, ATTN: RDMR–CST, Office of Research and Technology Applications (Ms. Wallace), 5400 Fowler Road, Redstone Arsenal, AL 35898. FOR FURTHER INFORMATION CONTACT: Questions about the proposed action can be directed to Ms. Cindy Wallace (256) 313–0895, Office of Research and Technology Applications, email: cindy.s.wallace.civ@mail.mil. SUPPLEMENTARY INFORMATION: 1. Project Description: AMRDEC seeks to ensure that technologies developed by AMRDEC are expeditiously commercialized and brought to practical use. The purpose of a CRADA is to find partner(s) to facilitate the development and commercialization of a technology that is in an early phase of development. Respondents interested in submitting a CRADA proposal should be aware that it may be necessary for them to secure a patent license to the above-mentioned patent pending technology in order to be able to commercialize products arising from a CRADA. CRADA partners are afforded an option to negotiate an exclusive license from the AMRDEC for inventions arising from the performance of the CRADA research plan. 2. Technology Overview: Conventional microprocessors have not tried to balance hardware performance and OS performance at the same time. The goal of the OS Friendly Architecture (OSFA) is to provide a high performance microprocessor and OS system. The architecture’s cache memory banks provide for near instantaneous context switching and hardware based information assurance. The OS Friendly Microprocessor Architecture includes hardware permission bits for each cache bank and each memory address. The OS Friendly Architecture is a switched set of cache memory banks in a pipeline configuration. For lightweight threads, the memory pipeline configuration provides near instantaneous context switching times. The pipelining and parallelism provided by the memory pipeline configuration provides for background cache read and write operations while the microprocessor’s execution pipeline is running instructions. The cache bank selection controllers provide arbitration to prevent the memory pipeline and microprocessor’s execution pipeline from accessing the same cache bank at the same time. This separation allows ADDRESSES: E:\FR\FM\04FEN1.SGM 04FEN1 mstockstill on DSK4VPTVN1PROD with NOTICES 6064 Federal Register / Vol. 80, No. 23 / Wednesday, February 4, 2015 / Notices the cache memory pages to transfer to and from level 1 (L1) caching while the microprocessor pipeline is executing instructions. OS information assurance is implemented in hardware. By extending Unix file permissions bits down to each cache memory bank and memory address, the OSFA provides hardware level information assurance. OS level access to cache controller banks is divided into access layers. Only the OS has permission to access and modify permission bits. The OS access layers also support partitions for a high reliability microkernel, hypervisors and full featured OS. For each software application, a table sets limits for all OS library function calls required by the application. Each library function call has a set of object limits. Exceeding the limits either requires higher than user level privileges or raises an exception. The full CRADA proposal should include a capability statement with a detailed description of collaborators’ expertise in the following and related technology areas: (1) Microprocessor design; (2) computer security; (3) information assurance; (4) collaborators’ expertise in successful technology transition; and (5) collaborator’s ability to provide adequate funding to support some project studies is strongly encouraged. A preference will be given to collaborators who shall manufacture hardware in the United States. Collaborators are encouraged to properly label any proprietary material in their CRADA proposal as PROPRIETARY. Do not use the phrase ‘‘company confidential.’’ 3. Publications: a. P. Jungwirth and P. LaFratta: ‘‘OS Friendly Microprocessor Architecture,’’ US Patent Application 20140082298, March 2014. https:// www.google.com/patents/ US20140082298. b. P. Jungwirth and P. LaFratta: ‘‘OS Friendly Microprocessor Architecture,’’ white paper, US Army AMRDEC, March 2014. (email Ms. Wallace at cindy.s.wallace.civ@mail.mil to request a copy of this paper). c. P. Jungwirth and P. LaFratta: ‘‘OS Friendly Microprocessor Architecture: Hardware Information Assurance,’’ January 2014. (email Ms. Wallace at cindy.s.wallace.civ@mail.mil to request a copy of this paper, a CDA is required to receive a copy of this paper). Brenda S. Bowen, Army Federal Register Liaison Officer. [FR Doc. 2015–02088 Filed 2–3–15; 8:45 am] BILLING CODE 3710–08–P VerDate Sep<11>2014 18:18 Feb 03, 2015 Jkt 235001 DEPARTMENT OF DEFENSE Department of the Army, Corps of Engineers [Docket ID: USA–2015–0005] Proposed Collection; Comment Request Department of the Army, U.S. Army Corps of Engineers, DoD. ACTION: Notice. AGENCY: In compliance with the Paperwork Reduction Act of 1995, the United States Army Corps of Engineers announces a proposed public information collection and seeks public comment on the provisions thereof. Comments are invited on: (a) Whether the proposed collection of information is necessary for the proper performance of the functions of the agency, including whether the information shall have practical utility; (b) the accuracy of the agency’s estimate of the burden of the proposed information collection; (c) ways to enhance the quality, utility, and clarity of the information to be collected; and (d) ways to minimize the burden of the information collection on respondents, including through the use of automated collection techniques or other forms of information technology. DATES: Consideration will be given to all comments received by April 6, 2015. ADDRESSES: You may submit comments, identified by docket number and title, by any of the following methods: • Federal eRulemaking Portal: https:// www.regulations.gov. Follow the instructions for submitting comments. • Mail: Federal Docket Management System Office, 4800 Mark Center Drive, East Tower, Suite 02G09, Alexandria, VA 22350–3100. Instructions: All submissions received must include the agency name, docket number and title for this Federal Register document. The general policy for comments and other submissions from members of the public is to make these submissions available for public viewing on the Internet at https:// www.regulations.gov as they are received without change, including any personal identifiers or contact information. Any associated form(s) for this collection may be located within this same electronic docket and downloaded for review/testing. Follow the instructions at https:// www.regulations.gov for submitting comments. Please submit comments on any given form identified by docket number, form number, and title. FOR FURTHER INFORMATION CONTACT: To request more information on this SUMMARY: PO 00000 Frm 00026 Fmt 4703 Sfmt 4703 proposed information collection or to obtain a copy of the proposal and associated collection instruments, please write to the U.S. Army Corps of Engineers, Directorate of Civil Works, Office of Planning and Policy, ATTN: Douglas Gorecki, 441 G Street, Washington, DC 20314, or call 202–761– 5450. SUPPLEMENTARY INFORMATION: Title; Associated Form; and OMB Number: Corps of Engineers Flood Risk Management Surveys; OMB Control Number OMB 0710–XXXX. Needs and Uses: The data obtained from these surveys are used by the Army Corps of Engineers to more effectively provide flood risk management to communities, residents, and businesses at risk of flooding. The data are needed for estimating damage relationships for factors such as depth of flooding for different types of buildings and different occupancies of uses. The data are also used for estimating other costs of flooding. Results of surveys will help communities to better determine and communicate their flood risks. The models are also used for programmatic evaluation of the Corps’s National Flood Risk Management Program. Affected Public: Residents, property owners, businesses, nongovernmental organizations, Local Governments. Annual Burden Hours: 1,825. Number of Respondents: 3,000. Responses per Respondent: 1. Average Burden per Response: 36.5 minutes. Frequency: On occasion. Respondents are floodplain residents, business owners and managers, managers of private institutions, and public officials. Most of the respondents live in or manage facilities that have been flooded in recent months. Dated: January 30, 2015. Aaron Siegel, Alternate OSD Federal Register, Liaison Officer, Department of Defense. [FR Doc. 2015–02164 Filed 2–3–15; 8:45 am] BILLING CODE 5001–06–P DEPARTMENT OF DEFENSE Department of the Army, Corps of Engineers Separation and Independent Evaluation of the Proposed Halligan and Seaman Water Management Projects in Northeastern Colorado Department of the Army, U.S. Army Corps of Engineers, DoD. ACTION: Notice. AGENCY: On February 1, 2006, the Omaha District, U.S. Army Corps of SUMMARY: E:\FR\FM\04FEN1.SGM 04FEN1

Agencies

[Federal Register Volume 80, Number 23 (Wednesday, February 4, 2015)]
[Notices]
[Pages 6063-6064]
From the Federal Register Online via the Government Printing Office [www.gpo.gov]
[FR Doc No: 2015-02088]


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DEPARTMENT OF DEFENSE

Department of Army


Notice of Intent To Seek Partners for a Cooperative Research and 
Development Agreement and Licensing Opportunity for Operating System 
(OS) Friendly Microprocessor Architecture Invented and Patent Pending 
by U.S. Army Aviation and Missile Command

AGENCY: Department of Army, DoD.

ACTION: Notice of intent seeking partners.

-----------------------------------------------------------------------

SUMMARY: The U.S. Army Aviation and Missile Command (AMRDEC) is seeking 
Cooperative Research and Development Agreement (CRADA) partners to 
collaborate in transitioning OS Friendly Microprocessor Architecture 
(OSFA) into commercial and/or government application(s). OSFA 
references approved for public release are provided [1-2]. Interested 
potential CRADA collaborators will receive detailed information on the 
current status of the project after signing a confidentiality 
disclosure agreement (CDA) with AMRDEC. Guidelines for the preparation 
of a full CRADA proposal will be communicated shortly thereafter to all 
respondents with whom initial confidential discussions will have 
established sufficient mutual interest. CRADA applications submitted 
after the due date may be considered if a suitable CRADA collaborator 
has not been identified by AMRDEC among the initial pool of 
respondents. Licensing of background technology related to this CRADA 
opportunity is also available to potential collaborators.

DATES: Interested candidate partners must submit a statement of 
interest and capability to the AMRDEC point of contact before April 10, 
2015 for consideration.

ADDRESSES: Comments and questions may be submitted to: Department of 
Army, US Army Research, Development and Engineering Command, Aviation 
and Missile Research, Development, and Engineering Center, ATTN: RDMR-
CST, Office of Research and Technology Applications (Ms. Wallace), 5400 
Fowler Road, Redstone Arsenal, AL 35898.

FOR FURTHER INFORMATION CONTACT: Questions about the proposed action 
can be directed to Ms. Cindy Wallace (256) 313-0895, Office of Research 
and Technology Applications, email: cindy.s.wallace.civ@mail.mil.

SUPPLEMENTARY INFORMATION:
    1. Project Description: AMRDEC seeks to ensure that technologies 
developed by AMRDEC are expeditiously commercialized and brought to 
practical use. The purpose of a CRADA is to find partner(s) to 
facilitate the development and commercialization of a technology that 
is in an early phase of development. Respondents interested in 
submitting a CRADA proposal should be aware that it may be necessary 
for them to secure a patent license to the above-mentioned patent 
pending technology in order to be able to commercialize products 
arising from a CRADA. CRADA partners are afforded an option to 
negotiate an exclusive license from the AMRDEC for inventions arising 
from the performance of the CRADA research plan.
    2. Technology Overview: Conventional microprocessors have not tried 
to balance hardware performance and OS performance at the same time. 
The goal of the OS Friendly Architecture (OSFA) is to provide a high 
performance microprocessor and OS system. The architecture's cache 
memory banks provide for near instantaneous context switching and 
hardware based information assurance. The OS Friendly Microprocessor 
Architecture includes hardware permission bits for each cache bank and 
each memory address.
    The OS Friendly Architecture is a switched set of cache memory 
banks in a pipeline configuration. For light-weight threads, the memory 
pipeline configuration provides near instantaneous context switching 
times. The pipelining and parallelism provided by the memory pipeline 
configuration provides for background cache read and write operations 
while the microprocessor's execution pipeline is running instructions. 
The cache bank selection controllers provide arbitration to prevent the 
memory pipeline and microprocessor's execution pipeline from accessing 
the same cache bank at the same time. This separation allows

[[Page 6064]]

the cache memory pages to transfer to and from level 1 (L1) caching 
while the microprocessor pipeline is executing instructions.
    OS information assurance is implemented in hardware. By extending 
Unix file permissions bits down to each cache memory bank and memory 
address, the OSFA provides hardware level information assurance. OS 
level access to cache controller banks is divided into access layers. 
Only the OS has permission to access and modify permission bits. The OS 
access layers also support partitions for a high reliability 
microkernel, hypervisors and full featured OS.
    For each software application, a table sets limits for all OS 
library function calls required by the application. Each library 
function call has a set of object limits. Exceeding the limits either 
requires higher than user level privileges or raises an exception.
    The full CRADA proposal should include a capability statement with 
a detailed description of collaborators' expertise in the following and 
related technology areas: (1) Microprocessor design; (2) computer 
security; (3) information assurance; (4) collaborators' expertise in 
successful technology transition; and (5) collaborator's ability to 
provide adequate funding to support some project studies is strongly 
encouraged. A preference will be given to collaborators who shall 
manufacture hardware in the United States.
    Collaborators are encouraged to properly label any proprietary 
material in their CRADA proposal as PROPRIETARY. Do not use the phrase 
``company confidential.''
    3. Publications: a. P. Jungwirth and P. LaFratta: ``OS Friendly 
Microprocessor Architecture,'' US Patent Application 20140082298, March 
2014. https://www.google.com/patents/US20140082298.
    b. P. Jungwirth and P. LaFratta: ``OS Friendly Microprocessor 
Architecture,'' white paper, US Army AMRDEC, March 2014. (email Ms. 
Wallace at cindy.s.wallace.civ@mail.mil to request a copy of this 
paper).
    c. P. Jungwirth and P. LaFratta: ``OS Friendly Microprocessor 
Architecture: Hardware Information Assurance,'' January 2014. (email 
Ms. Wallace at cindy.s.wallace.civ@mail.mil to request a copy of this 
paper, a CDA is required to receive a copy of this paper).

Brenda S. Bowen,
Army Federal Register Liaison Officer.
[FR Doc. 2015-02088 Filed 2-3-15; 8:45 am]
BILLING CODE 3710-08-P

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